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LATX, fix: Manage mode 2 softfpu helper regions #427

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LATX, fix: Manage mode 2 softfpu helper regions #427

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4c71a6f
LATX, fix: Close softfpu helper regions at TB end
ganjue66da Aug 24, 2026
af8b2fe
LATX, opt: Avoid redundant x87 helper state transfers
ganjue66da Aug 24, 2026
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52 changes: 39 additions & 13 deletions target/i386/latx/translator/tr-softfpu.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1596,13 +1596,17 @@ static bool translate_fist_softfpu(IR1_INST *pir1)
la_label(label_exit);

} else {
gen_softfpu_helper_prologue(pir1);
if (option_softfpu == 1) {
gen_softfpu_helper_prologue(pir1);
}
if (opnd_size == 16) {
gen_softfpu_helper1((ADDR)helper_fist_ST0);
} else if (opnd_size == 32) {
gen_softfpu_helper1((ADDR)helper_fistl_ST0);
}
gen_softfpu_helper_epilogue(pir1);
if (option_softfpu == 1) {
gen_softfpu_helper_epilogue(pir1);
}

/* v0 */
store_ireg_to_ir1(a0_ir2_opnd, opnd0, false);
Expand Down Expand Up @@ -1690,7 +1694,9 @@ static bool translate_fistp_softfpu(IR1_INST *pir1)
IR1_OPND *opnd0 = ir1_get_opnd(pir1, 0);
int opnd_size = ir1_opnd_size(opnd0);

gen_softfpu_helper_prologue(pir1);
if (option_softfpu == 1) {
gen_softfpu_helper_prologue(pir1);
}
if (opnd_size == 16) {
gen_softfpu_helper1((ADDR)helper_fist_ST0);
} else if (opnd_size == 32) {
Expand All @@ -1705,7 +1711,9 @@ static bool translate_fistp_softfpu(IR1_INST *pir1)
save_gpr();

gen_softfpu_helper1((ADDR)helper_fpop);
gen_softfpu_helper_epilogue(pir1);
if (option_softfpu == 1) {
gen_softfpu_helper_epilogue(pir1);
}
}
return true;
}
Expand All @@ -1715,7 +1723,9 @@ static bool translate_fisttp_softfpu(IR1_INST *pir1)
IR1_OPND *opnd0 = ir1_get_opnd(pir1, 0);
int opnd_size = ir1_opnd_size(opnd0);

gen_softfpu_helper_prologue(pir1);
if (option_softfpu == 1) {
gen_softfpu_helper_prologue(pir1);
}
if (opnd_size == 16) {
gen_softfpu_helper1((ADDR)helper_fistt_ST0);
} else if (opnd_size == 32) {
Expand All @@ -1730,7 +1740,9 @@ static bool translate_fisttp_softfpu(IR1_INST *pir1)
save_gpr();

gen_softfpu_helper1((ADDR)helper_fpop);
gen_softfpu_helper_epilogue(pir1);
if (option_softfpu == 1) {
gen_softfpu_helper_epilogue(pir1);
}

return true;
}
Expand Down Expand Up @@ -2670,11 +2682,15 @@ static bool translate_fst_softfpu(IR1_INST *pir1)
int opnd_size = ir1_opnd_size(opnd0);
int opnd0_base_num = ir1_opnd_base_reg_num(opnd0);

gen_softfpu_helper_prologue(pir1);
if (option_softfpu == 1) {
gen_softfpu_helper_prologue(pir1);
}
if (ir1_opnd_is_fpr(opnd0)) {
gen_softfpu_helper2i((ADDR)helper_fmov_STN_ST0,
opnd0_base_num);
gen_softfpu_helper_epilogue(pir1);
if (option_softfpu == 1) {
gen_softfpu_helper_epilogue(pir1);
}
return true;
}

Expand All @@ -2683,7 +2699,9 @@ static bool translate_fst_softfpu(IR1_INST *pir1)
} else if (opnd_size == 64) {
gen_softfpu_helper1((ADDR)helper_fstl_ST0);
}
gen_softfpu_helper_epilogue(pir1);
if (option_softfpu == 1) {
gen_softfpu_helper_epilogue(pir1);
}

/* v0 */
store_ireg_to_ir1(a0_ir2_opnd, opnd0, false);
Expand All @@ -2701,13 +2719,17 @@ static bool translate_fstp_softfpu(IR1_INST *pir1)
IR1_OPND *opnd0 = ir1_get_opnd(pir1, 0);
int opnd_size = ir1_opnd_size(opnd0);

gen_softfpu_helper_prologue(pir1);
if (option_softfpu == 1) {
gen_softfpu_helper_prologue(pir1);
}
if (ir1_opnd_is_fpr(opnd0)) {
int opnd0_base_num = ir1_opnd_base_reg_num(opnd0);
gen_softfpu_helper2i((ADDR)helper_fmov_STN_ST0,
opnd0_base_num);
gen_softfpu_helper1((ADDR)helper_fpop);
gen_softfpu_helper_epilogue(pir1);
if (option_softfpu == 1) {
gen_softfpu_helper_epilogue(pir1);
}
return true;
}

Expand All @@ -2716,7 +2738,9 @@ static bool translate_fstp_softfpu(IR1_INST *pir1)
IR2_OPND mem_opnd = convert_mem_no_offset(opnd0);
gen_softfpu_helper2m_ptr((ADDR)helper_fstt_ST0, mem_opnd);
gen_softfpu_helper1((ADDR)helper_fpop);
gen_softfpu_helper_epilogue(pir1);
if (option_softfpu == 1) {
gen_softfpu_helper_epilogue(pir1);
}
return true;
}

Expand All @@ -2729,7 +2753,9 @@ static bool translate_fstp_softfpu(IR1_INST *pir1)
store_ireg_to_ir1(a0_ir2_opnd, opnd0, false);
save_gpr();
gen_softfpu_helper1((ADDR)helper_fpop);
gen_softfpu_helper_epilogue(pir1);
if (option_softfpu == 1) {
gen_softfpu_helper_epilogue(pir1);
}

}
return true;
Expand Down
5 changes: 4 additions & 1 deletion target/i386/latx/translator/translate.c
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Original file line number Diff line number Diff line change
Expand Up @@ -2240,7 +2240,10 @@ int tr_ir2_generate(struct TranslationBlock *tb)
}

if (option_softfpu == 2 && reduce_proepo) {
if (i < ir1_nr - 1) {
if (i == ir1_nr - 1) {
reduce_proepo = false;
gen_softfpu_helper_epilogue(pir1);
} else {
IR1_INST *pir1_next = pir1 + 1;
tr_func_idx = ir1_opcode(pir1_next) - dt_X86_INS_INVALID;
if (tr_func_idx > dt_X86_INS_FYL2XP1) {
Expand Down