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Add .lower() methods to reduction and replication expressions #9123
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| Original file line number | Diff line number | Diff line change |
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@@ -344,3 +344,60 @@ exprt onehot0_exprt::lower() const | |
| // at most one bit is set | ||
| return let_exprt{symbol, op(), not_exprt{more_than_one_seen}}; | ||
| } | ||
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| exprt reduction_and_exprt::lower() const | ||
| { | ||
| auto &operand = op(); | ||
| return equal_exprt{ | ||
| operand, to_bitvector_type(operand.type()).all_ones_expr()}; | ||
| } | ||
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| exprt reduction_nand_exprt::lower() const | ||
| { | ||
| auto &operand = op(); | ||
| return notequal_exprt{ | ||
| operand, to_bitvector_type(operand.type()).all_ones_expr()}; | ||
| } | ||
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| exprt reduction_or_exprt::lower() const | ||
| { | ||
| auto &operand = op(); | ||
| return notequal_exprt{ | ||
| operand, to_bitvector_type(operand.type()).all_zeros_expr()}; | ||
| } | ||
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| exprt reduction_nor_exprt::lower() const | ||
| { | ||
| auto &operand = op(); | ||
| return equal_exprt{ | ||
| operand, to_bitvector_type(operand.type()).all_zeros_expr()}; | ||
| } | ||
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| exprt reduction_xor_exprt::lower() const | ||
| { | ||
| auto &operand = op(); | ||
| auto width = to_bitvector_type(operand.type()).width(); | ||
| PRECONDITION(width >= 1); | ||
| exprt::operandst bits; | ||
| bits.reserve(width); | ||
| for(std::size_t i = 0; i < width; i++) | ||
| bits.push_back(extractbit_exprt{operand, i}); | ||
| return xor_exprt{std::move(bits)}; | ||
| } | ||
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| exprt reduction_xnor_exprt::lower() const | ||
| { | ||
| return not_exprt{reduction_xor_exprt{op()}.lower()}; | ||
| } | ||
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kroening marked this conversation as resolved.
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| exprt replication_exprt::lower() const | ||
| { | ||
| // zero-replications are allowed, and yield a concatenation | ||
| // with no operands. | ||
| auto count = numeric_cast_v<std::size_t>(times()); | ||
| exprt::operandst ops; | ||
| ops.reserve(count); | ||
| for(std::size_t i = 0; i < count; i++) | ||
| ops.push_back(op()); | ||
| return concatenation_exprt{std::move(ops), type()}; | ||
| } | ||
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Comment on lines
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Collaborator
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. I believe we want
Collaborator
Author
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Verilog does allow zero replications in concatenations; I realise this makes lowering to SMT-LIB a bit harder. I'll add a comment.
Collaborator
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. We might just need to fix it on the SMT-LIB output side (which already tries to catch zero-width expressions in some places).
Collaborator
Author
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Yes |
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